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Silicon Design Engineer 2- 122804

Advanced Micro Devices inc.

This is a Contract position in Markham, ON posted October 29, 2021.

What you do at AMD changes everything 

At AMD, we push the boundaries of what is possible.  We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. 

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results.  It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world.   If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.




Silicon Design Engineer 2

The Role:


Central DFX (CDFX) is a centralized ASIC design group within AMD’s Technology and Engineering organization. CDFX has a global footprint with design teams located in several AMD offices in North America and Asia. Our mandate is to optimize and standardize design methodology, design and implementation of critical Design-for-Test (DFT) and Design-for-Debug (DFD) features for sophisticated innovative APU computing, game console and GPU graphics products. It is also responsible for DFX design methodology and CAD automation tools development to support the global DFX engineering teams across AMD.


The Person:


DFx (DFT, DFD) is a niche field of ASIC design where crucial functionality is added to support semiconductor productization including manufacturing test, yield improvement and board debug. A DFT designer would need to factor many multi-dimensional issues such as power, area and timing. Our work is a key contributor to delivering a high-quality design and can improve AMD’s operating expenses in the millions.

This team is vital to the success of AMD as a growing company. It is a dynamic and exciting ASIC design environment. You will be working on some of the most exciting projects with groundbreaking technologies


Key Responsibilities:


  • Understand Design-for-Test (DFT) and Design-for-Debug (DFD) architecture
  • Implement and deploy automated design flows to implement DFT features in a complex SOC ASIC design or IP subsystem
  • Perform scan ATPG design rule checking, pattern generation, simulation and coverage analysis
  • Collaborate with IP teams to configure and embed DFT RTL
  • Setup and execute design checks using both industry standard and in-house tools.
  • Deliver Perl, TCL scripts that provide scalable solutions key to DFT implementation
  • Build block-/chip-level Design Verification (DV) test plan
  • Develop test cases, behavioural functional models and testbench
  • Verify block-/chip-level DFT/DFD features
  • Monitor CAD and/or IP regression results, debug failures and analyze coverage


Preferred Experience:


  • Experience with Perl/Shell scripting and C
  • Digital circuits and VLSI knowledge
  • Experience with Verilog environment is an asset
  • Strong problem solving skills
  • Good object oriented programming skills (C++) is a must
  • Good written and oral communication skills
  • Standout colleague with strong interpersonal skills


Academic Credentials:


  • Bachelor in Computer Science, Computer Engineering or equivalent degree plus 0-3 years proven experience



  • Canada, Ontario, Markham


Requisition Number: 122804 
Country: Canada Province: Ontario City: Markham 
Job Function:Design


AMD is an inclusive employer dedicated to building a diverse workforce. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective provincial human rights codes throughout all stages of the recruitment and selection process. Any applicant who requires accommodation should contact

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services.